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在上期的前沿文献推荐中，介绍了光电半导体领域的最新进展，包括：用于下一代数据通信的新兴发光二极管，具有视觉适应能力的光电晶体管，三维可折叠量子点发光二极管，以及光强依赖的主动光适应有机晶体管。在本期的文献推荐中，关注点着眼于半导体领域的最新进展。其中，我校信息光子学与光通信国家重点实验室雷鸣、屈贺如歌与北京大学物理学院、北京大学深圳研究生院等多个单位同事合作，受邀在物理学顶级综述期刊《物理报道》（Physics Reports，影响因子：25.6）上在线发表长篇综述文章“Sub-10 nm two-dimensional transistors: Theory and experiment”，系统阐述了亚10 nm二维晶体管的最新实验和理论研究进展。“All-in-one two-dimensional retinomorphic hardware device for motion detection and recognition”一文提出了“ALL IN ONE”器件，实现了集探测、存储和计算（即感存算）为一体的原型器件。“How we made the 2D transistor”介绍了第一个基于单层二硫化钼（MoS2）的晶体管。“Aligned 2D carbon nanotube liquid crystals for wafer-scale electronics”所提新技术可以实现在工业规模中实现碳纳米管的高度排列。上述文献供相关领域的科研人员参考。领域一亚10纳米二维场效应晶体管：理论与实验 Sub-10 nm two-dimensional transistors: Theory and experiment Ruge Quhe, etc. Physics Reports, 2021: 1-72 Presently Si-based field-effect transistors (FETs) are approaching their physical limit, and further scaling their gate length down to the sub-10 nm region is becoming extremely difficult. Benefitting from the atomic-scale thickness and dangling-bond-free flat surface, two-dimensional semiconductors (2DSCs) have good electrostatics and carrier transportability. The FETs based on the 2DSC channel have the potential to scale the FETs’ gate length down to the sub-10 nm region while avoiding apparent degradation of the device performance. In this review, we introduce the recent experimental and ab initio quantum transport simulation progress in the 2D FETs with a gate length less than 10 nm. Remarkably, in the extremely optimistic condition, many 2D FETs (i.e phosphorene, silicane, arsenene, tellurene, WSe2, InSe, Bi2O2Se, GeSe, etc.) show excellent device performance for the high performance and/or low power applications and indeed can extend Moore’s law down to 12-nm gate length in terms of the ab initio quantum transport simulation. The sub-10 nm 2D tunneling FETs are predicted to generally have smaller energy-delay products compared with the 2D metal–oxide–semiconductor FETs and appear more competitive for the low power application. The carrier effective mass plays a key role in determining the device performance. Via negative capacitance techniques, the device performance can be further improved. Finally, we outline the challenges and outlook on the future development directions in the sub-10 nm 2D FETs. https://www.sciencedirect.com/science/article/pii/S0370157321003252 Fig. Sub-10 nm MX transistors 领域二用于运动检测和识别的一体化二维视网膜形态的硬件设备 All-in-one two-dimensional retinomorphic hardware device for motion detection and recognition Zhenhan Zhang, etc. Nature Nanotechnology, 2021 With the advent of the Internet of Things era, the detection and recognition of moving objects is becoming increasingly important1. The current motion detection and recognition (MDR) technology based on the complementary metal oxide semiconductor (CMOS) image sensors (CIS) platform contains redundant sensing, transmission conversion, processing and memory modules, rendering the existing systems bulky and inefficient in comparison to the human retina. Until now, non-memory capable vision sensors have only been used for static targets, rather than MDR. Here, we present a retina-inspired two-dimensional (2D) heterostructure based retinomorphic hardware device with all-in-one perception, memory and computing capabilities for the detection and recognition of moving trolleys. The proposed 2D retinomorphic device senses an optical stimulus to generate progressively tuneable positive/negative photoresponses and memorizes it, combined with interframe differencing computations, to achieve 100% separation detection of moving trichromatic trolleys without ghosting. The detected motion images are fed into a conductance mapped neural network to achieve fast trolley recognition in as few as four training epochs at 10% noise level, outperforming previous results from similar customized datasets. The prototype demonstration of a 2D retinomorphic device with integrated perceptual memory and computation provides the possibility of building compact, efficient MDR hardware. https://www.nature.com/articles/s41565-021-01003-1 领域三我们如何制作二维晶体管 How we made the 2D transistor Andras Kis Nature Electronics, 2021 Semiconducting two-dimensional materials might one day be used in scaled semiconductor technology. Andras Kis recounts how the first transistor based on a single layer of molybdenum disulfide was created. https://www.nature.com/articles/s41928-021-00675-w Fig. Photograph of the monolayer MoS2 transistor, which was fabricated in July 2010, in its ceramic package. 领域四用于晶圆级电子设备的对齐二维碳纳米管液晶 Aligned 2D carbon nanotube liquid crystals for wafer-scale electronics KATHERINE R. JINKINS, etc. SCIENCE ADVANCES, 2021, 37(7) Semiconducting carbon nanotubes promise faster performance and lower power consumption than Si in field-effect transistors (FETs) if they can be aligned in dense arrays. Here, we demonstrate that nanotubes collected at a liquid/liquid interface self-organize to form two-dimensional (2D) nematic liquid crystals that globally align with flow. The 2D liquid crystals are transferred onto substrates in a continuous process generating dense arrays of nanotubes aligned within ±6°, ideal for electronics. Nanotube ordering improves with increasing concentration and decreasing temperature due to the underlying liquid crystal phenomena. The excellent alignment and uniformity of the transferred assemblies enable FETs with exceptional on-state current density averaging 520 μA μm-1at only -0.6 V, and variation of only 19%. FETs with ion gel top gates demonstrate subthreshold swing as low as 60 mV decade-1. Deposition across a 10-cm substrate is achieved, evidencing the promise of 2D nanotube liquid crystals for commercial semiconductor electronics. https://www.science.org/doi/10.1126/sciadv.abh0640 Fig. Experimental apparatus for studying 2D liquid crystalline interfacial assembly in TaFISA.

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