返回信息流Job Description:
Work with global Front-End design team and physical design team for large scale ASIC chip physical implementation. Focus on physical design of deep sub-micron GPU chips including block level (full chip) floor planning, timing closure, place&route, physical verification etc. The individual is expected to be an expert in multiple aspects in PD areas and provide technically leadership to the engineering team. The individual is also expected to be accountable for project delivery.
Job Requirement:
1. MSEE with 6+ years or Bachelor with 8+ years of industrial experience in ASIC design
2. 4+ years or more years of experience in physical design of deep submicron digital ASIC chips
3. Demonstrate strong leadership and work well with cross-functional teams
4. Good listening, writing and speaking English
5. Good communication skills, strong interpersonal skills and the flexibility
6. Familiar with Back-End (physical design) EDA tools and hierarchical fullchip floorplan flow
7. Good at scripts or tcl
8. Plus with 5+ projects tapeout experience
[ema0]有想法的朋友可以把简历发到c561@topuc.com,热烈欢迎推荐~[ema20]
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上海--MTS Engineer of Physical Design
sophia617
2014/8/20镜像同步4 回复
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