返回信息流library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity keyboard is
port(
start,reset,clock,changefire : IN STD_LOGIC; --START changemode,
time1,time2,time3,time4 : IN STD_LOGIC; --SET TIME
beep : OUT STD_LOGIC;
clkout : out std_logic;
distime : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); --TIME DISPLAY
cat : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); --CAT SELECT
dotrow, dotcol : OUT STD_LOGIC_VECTOR(7 DOWNTO 0) --DOT
);
end keyboard ;
architecture behave of keyboard is
signal dist : std_logic_vector(3 downto 0);
signal clk : std_logic;
signal state : std_logic;
signal count : integer range 0 to 3599;
signal fire : std_logic_vector(2 downto 0);
signal T : integer range 0 to 9;
signal row, col: std_logic_vector(7 DOWNTO 0);
signal c :std_logic_vector(3 downto 0); --signal cat;
begin
process(clock) --50M FEN PIN
variable num : integer range 9 downto 0;
begin
if rising_edge(clock) then
num:=num+1;
if num=9 then
num:=0;
clk<=not clk;
end if;
end if;
clkout<=clk;
end process;
process(start,reset,changefire,time1,time2,time3,time4,clock) --an jianchangemode,
variable temp : integer range 3599 downto 0;
variable fen1,miao1 :integer range 9 downto 0 :=0;
variable fen2,miao2 :integer range 5 downto 0 :=0;
variable pp : std_logic;
begin
if(reset='1') then state<='0';end if; --复位状态 --beep<='1';temp:=0;
if(start='1') then state<='1';end if; --开始状态 --state<='1';
if(state='0') then --火力、时间设置
if(rising_edge(changefire))then
case fire is
when "100"=>fire<="010";
when "010"=>fire<="001";
when others =>fire<="100";
end case;
end if;
if(time1'event and time1='1') then
miao1:=miao1+1;
end if;
if(time2'event and time2='1') then
miao2:=miao2+1;
end if;
if(time3'event and time3='1') then
fen1:=fen1+1;
end if;
if(time4'event and time4='1') then
fen2:=fen2+1;
end if;
temp:=miao1+miao2*10+fen1*60+fen2*600;
elsif(state='1') then --启动倒计时
if(clk'event and clk='1')then
if(temp>0)then
temp:=temp-1;
else
temp:=0;
end if;
end if;
end if;
count<=temp;
end process;
process(clock) --时间显示
variable ge,shi,bai,qian: integer range 0 to 9;
variable tt : integer range 9 downto 0;
begin
ge:=count mod 10;
shi:=(count mod 60)/10;
bai:=(count/60)mod 10;
qian:=count/600;
if(rising_edge(clock)) then --T wei shi jian ji suan
case c is
when "1110"=>c<="1101";tt:=ge;--T<=ge; --miao1
when "1101"=>c<="1011";tt:=shi;--T<=shi;--(count mod 60)/10; --miao2
when "1011"=>c<="0111";tt:=bai;--T<=bai;--(count/60)mod 10; --fen1
when others=>c<="1110";tt:=qian;--T<=qian;--count/600; --fen2
end case;
cat<=c;--T<=ge;
end if;
case tt is
when 1=>distime<="0001";--0110000
when 2=>distime<="0010";--1101101
when 3=>distime<="0011";--1111001
when 4=>distime<="0100";--0110011
when 5=>distime<="0101";--1011011
when 6=>distime<="0110";--1011111
when 7=>distime<="0111";--1110000
when 8=>distime<="1000";--1111111
when 9=>distime<="1001";--1111011
when others=>distime<="0000";--1111110
end case;
end process;
process(clock,fire)
begin --大中小火力
if(rising_edge(clock))then
if(fire="100")then
case col is
when "11111110"=>row<="11111101";col<="00000000";
when "11111101"=>row<="11111011";col<="01000001";
when "11111011"=>row<="11110111";col<="00100010";
when "11110111"=>row<="11101111";col<="00010100";
when "11101111"=>row<="11011111";col<="01111110";
when "11011111"=>row<="10111111";col<="00001000";
when "10111111"=>row<="01111111";col<="00001000";
when others =>row<="11111110";col<="00000000";
end case;
elsif(fire="010")then
case row is
when "11111110"=>row<="11111101";col<="00010000";
when "11111101"=>row<="11111011";col<="00010000";
when "11111011"=>row<="11110111";col<="00010000";
when "11110111"=>row<="11101111";col<="01111110";
when "11101111"=>row<="11011111";col<="01010010";
when "11011111"=>row<="10111111";col<="01111110";
when "10111111"=>row<="01111111";col<="00010000";
when others =>row<="11111110";col<="00010000";
end case;
elsif(fire="001")then
case row is
when "11111110"=>row<="11111101";col<="00000000";
when "11111101"=>row<="11111011";col<="00010000";
when "11111011"=>row<="11110111";col<="00110000";
when "11110111"=>row<="11101111";col<="01010010";
when "11101111"=>row<="11011111";col<="00110100";
when "11011111"=>row<="10111111";col<="00010000";
when "10111111"=>row<="01111111";col<="00010000";
when others =>row<="11111110";col<="00010000";
end case;
end if;
end if;
dotrow<=row;dotcol<=col;
end process;
end behave;
这是一条镜像帖。来源：北邮人论坛 / circuit / #21520同步于 2012/10/25
该镜像源已超过 30 天没有更新，可能在源站已被删除。
Circuit机器人发帖
[VHDL]时钟沿跟输出问题，请教
zhengy222
2012/10/25镜像同步5 回复
订阅后，新回复会通过你的通知中心匿名送达。
5 条回复
【 在 chrischen25 的大作中提到: 】
: 我看到LZ的代码，无比的蛋疼，VHDL，不是C，请先理解好时序逻辑和组合逻辑。
我是看到VHDL就头疼。。。