返回信息流Position Title: Application Engineer-Intern
Duration: 3 working days per week for 6 months or full time for 3 months at least
Responsibilities:
The role of this position is primarily to implement algorithm in FPGA. The responsibilities include but not limited to:
Implement algorithms and communication protocol with RTL code.
Design test branch to evaluate on-board peripherals' functions.
MSEE or above in Microelectronics/Electrical Engineering or related Experience in any of below is a plus.
Digital design (VHDL/Verilog) skills;
Experience with hardware, HDL and software debugging/troubleshooting;
Knowledge of embedded systems, processors such as ARM7 or Cortex-M;
Familiarity with Xilinx/Altera devices and tools;
Knowledge of scripting languages (Perl/TCL) and shell scripts；
Knowledge of analog, linear and mixed-signal circuit fundamentals and devices is a plus
工作地点：北京市/北京市/海淀区 东升科技园B区6号楼A座 西小口路东升科技园
每周工作3天以上，三个月
200-400一天
实习僧投递
https://www.shixiseng.com/intern/inn_puxysdarydqm
这是一条镜像帖。来源：北邮人论坛 / parttime-job / #949511同步于 2023/5/30
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【实习】【ADI】Application Engineer Intern---RTL工程师
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2023/5/30镜像同步0 回复
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